1. Field of the Invention
The present invention relates to a liquid crystal display apparatus, control circuit thereof, and a method for driving a liquid crystal display panel.
2. Description of the Related Art
A computer is able to select one of a plurality of resolution powers (dot matrix construction) and output its video signals. To the contrary, the dot matrix construction of a liquid crystal display is fixed.
Therefore, for example in FIG. 12(A), in order to display video data of VGA (640xc3x97480 pixels), XGA (1,024xc3x97768 pixels) or SXGA (1,280xc3x971,024 pixels) with the full screen by a liquid crystal display panel of SVGA (800xc3x97600 pixels), it is necessary to process digital picture images with a memory, a memory control circuit and a digital filter circuit added to the liquid crystal display. Accordingly, such problems arise, by which the production cost is increased, the mounting area of parts is increased, and consumption power is also increased.
In order to solve these problems, in a case where the number of picture lines is multiplied by three-fourths, for example, as shown in FIG. 12(B), one picture line may be omitted for every four picture lines. However, in a picture, for example, a black line and a white line are alternately disposed, the lines may be made thicker or thinner, and a smooth display can not be obtained. As shown in FIG. 12(C), in a case where the number of picture lines is multiplied by fourth-thirds, one picture line may be doubly added for every three picture lines. However, the line may be also made thicker or thinner as in the case of omitting, and a smooth display can not be obtained.
In view of the above problems, it is an object of the present invention to provide a liquid crystal display apparatus, control circuit thereof, and a method for driving a liquid crystal display panel, which have a simple construction and are able to smoothly display images by increasing or decreasing the number of display lines in order to display in enlargement or contraction.
In the 1st aspect of the present invention, there is provided a liquid crystal display apparatus, comprising: an active matrix type liquid crystal panel in which potentials of respective data lines are applied to respective display electrodes of a selected display line via respective switching devices of the selected display line, the selected display line corresponding to a selected one of scanning lines; a data driver for applying the potentials to the respective data lines and renewing the potentials at every horizontal cycle; a scanning driver for providing scanning pulses to the respective scanning lines in line-sequence; and a control circuit for causing a timing of the rear edge of a scanning pulse provided to a predetermined scanning line to coincide with a time when the potentials of the data lines is renewed, wherein the predetermined scanning line is one corresponding to an addition of picture line to or a reduction of picture line from a picture to be displayed, in order to compensate a difference between the number of the scanning lines and that of picture lines of the picture to be displayed.
With the 1st aspect of the present invention, with a simple construction without a digital filtering, etc., it is possible to further smoothly display a picture than in a prior art where adding duplicated picture lines to or reducing picture lines from a picture since each of the display potentials of the respective pixels of the scanning line corresponding to the addition or reduction of picture line is made to a potential between the display potentials of the adjacent pixels on the adjacent scanning lines.
In the 2nd aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 1st aspect, wherein the control circuit comprises: a first counter counting pulses of a clock signal and initialized by a horizontal synchronization pulse; and a pulse rear edge timing circuit for setting the timing of the rear edge at a time when a count of the first counter is equal to a first value.
With the 2nd aspect of the present invention, since the timing is determined with a digital circuit, it is possible to avoid an adjustment deviation depending on the variation of temperature or characteristics of circuit elements.
In the 3rd aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 2nd aspect, wherein the clock signal is a pixel clock signal.
With the 3rd aspect of the present invention, since a pixel clock is commonly used for a data driver and a control circuit, it is not necessary to generate an additional clock.
In the 4th aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 2nd aspect, wherein the control circuit further comprises: a second counter counting the horizontal synchronization pulses and initialized by a vertical synchronization pulse; and wherein the pulse rear edge timing circuit executes the setting when a count of the second counter is equal to a second value.
In the 5th aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 4th aspect, further comprising a reference value determination circuit for detecting cycle times of the horizontal synchronization pulse and the vertical synchronization pulse and for determining the first value on the basis of the detected cycle times and a count of the second counter.
With the 5th aspect of the present invention, since the 1st value can be suitably determined on the basis of these detection values and the count of the 2nd counter, the construction of the control circuit can be simplified.
In the 6th aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 2nd aspect, wherein the scanning driver comprises: a shift register in which a selection bit is shifted by one bit at every scanning pulse; an output buffer circuit having outputs connected to respective the scanning lines; and a timing adjustment circuit for determining an output of the output buffer circuit on the basis of a parallel output of the shift register and an output of the pulse rear edge timing circuit.
In the 7th aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 6th aspect, wherein the timing adjustment circuit causes the output buffer circuit to generate the scanning pulse corresponding to a bit of the parallel output when this bit becomes the selected bit and to disappear the scanning pulse when a binary output of the pulse rear edge timing circuit becomes active.
With the 7th aspect of the present invention, the construction of a timing adjustment circuit can be simplified.
In the 8th aspect of the present invention, there is provided a liquid crystal display apparatus as defined in the 1st aspect, wherein the timing in the control circuit approximately coincides with a time point when the display potential becomes the center between the maximum and minimum display potentials in a same polarity.
In the 9th aspect of the present invention, there is provided a control circuit for use in a liquid crystal display apparatus, the control circuit causing a timing of the rear edge of a scanning pulse provided to a predetermined scanning line to coincide with a time when potentials of data lines is renewed, wherein the predetermined scanning line is one corresponding to an addition of picture line to or a reduction of picture line from a picture to be displayed, in order to compensate a difference between the number of the scanning lines and that of picture lines of the picture to be displayed.
In the 10th aspect of the present invention, there is provided a method of driving a liquid crystal display panel, comprising the steps of: providing an active matrix type liquid crystal panel in which potentials of respective data lines are applied to respective display electrodes of a selected display line via respective switching devices of the selected display line, the selected display line corresponding to a selected one of scanning lines; applying the potentials to the respective data lines and renewing the potentials at every horizontal cycle; providing scanning pulses to the respective scanning lines in line-sequence; and causing a timing of the rear edge of a scanning pulse provided to a predetermined scanning line to coincide with a time when the potentials of the data lines is renewed, wherein the predetermined scanning line is one corresponding to an addition of picture line to or a reduction of picture line from a picture to be displayed, in order to compensate a difference between the number of the scanning lines and that of picture lines of the picture to be displayed.
In the 11th aspect of the present invention, there is provided a method as defined in the 10th aspect, wherein the step of the causing includes the steps of: initializing a first count with a horizontal synchronization pulse and counting clock pulses to get the first count; initializing a second count with a vertical synchronization pulse and counting the horizontal synchronization pulses to get the second count; and setting the timing of the rear edge at a time when the first and second counts become first and second values, respectively.
In the 12th aspect of the present invention, there is provided a method as defined in the 10th aspect, wherein the step of the causing includes the steps of: initializing a first count with a horizontal synchronization pulse and counting clock pulses to get the first count; initializing a second count with a vertical synchronization pulse and counting the horizontal synchronization pulses to get the second count; and setting the timing of the rear edge at a time when the first and second counts become first and second values, respectively.
In the 13th aspect of the present invention, there is provided a method as defined in the 11th aspect, wherein the step of the causing further includes the steps of: detecting cycle times of the horizontal synchronization pulse and the vertical synchronization pulse; and determining the first value on the basis of the detected cycle times and the second count.
In the 14th aspect of the present invention, there is provided a method as defined in the 11th aspect, wherein the timing in the step of the setting approximately coincides with a time point when the display potential becomes the center between the maximum and minimum display potentials in a same polarity.
Other aspects, objects, and the advantages of the present invention will become apparent from the following detailed description taken in connection with the accompanying drawings.